[转载]【FPGA冷知识】Quartus II工程中的sld_hub是什么?
(2018-11-01 14:59:56)
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转载 |
分类: FPGA |
官网答案:
The sld_hub entity is an interface controller between the JTAG pins
on your device and the following Quartus®
- SignalTap™ II Logic Analyzer
- In-System Memory Content Editor
- Logic Analyzer Interface
- Nios® II JTAG UART
- Nios II
On-Chip Debugging (OCD)