1、 MegaWizard

http://s13/middle/732786b3ta6ae557d335c&690DDIO_OUT功能" TITLE="Altera DDIO_OUT功能" />

2、 仿真

http://s12/middle/732786b3ta6ae558b14cb&690DDIO_OUT功能" TITLE="Altera DDIO_OUT功能" />

上升沿锁存两个输入数据，然后分别在上升沿、下降沿输出。

仿真代码：

`timescale 1 ns / 1 ps

module tb();

reg    [7:0] datain_h_sig = 0;

reg    [7:0] datain_l_sig = 0;

reg    outclock_sig;

wire  [7:0] dataout_sig;

ddio_test       ddio_test_inst (

  .datain_h ( datain_h_sig ),

  .datain_l ( datain_l_sig ),

  .outclock ( outclock_sig ),

  .dataout ( dataout_sig )

  );

always

begin

outclock_sig  <= 1'b0;

#5;

outclock_sig  <= 1'b1;

#5;

end

always@(posedge outclock_sig)

begin

datain_h_sig <= datain_h_sig + 1'b1;

datain_l_sig   <= datain_l_sig + 2'b11;

end

endmodule

tcl脚本：

global env

if ![info exists env(QUARTUS_ROOTDIR)] {

  puts "Expected Enviroment Variable QUARTUS_ROOTDIR pointing to a valid Quartus II installation"

  exit

}

set q_sim_lib [file join $env(QUARTUS_ROOTDIR) eda sim_lib]

quit -sim

vlib altera_mf

vmap altera_mf altera_mf

vlog -work altera_mf [file join $q_sim_lib altera_mf.v]

vlib work

vmap work work

vlog ddio_test.v

vlog tb.v

vsim -L altera_mf -novopt -t ns work.tb

log -r /*

run 1 us