set_multicycle_path 0 –setup 应用

 

一般情况下，在做setup check 的时候，launch edge 与 capture edge 相差一个时钟周期。例如

report_timing -delay max -from outputc_reg[3]/CK -to  outputd_reg[15]/D

****************************************

Report : timing

……

  Point                                                   Incr       Path

  clock clk_20 (rise edge)                                0.00       0.00

  clock network delay (ideal)                             0.00       0.00

  outputc_reg[3]/CK (DFFRHQX1)                            0.00       0.00 r

  outputc_reg[3]/Q (DFFRHQX1)                             0.80       0.80 r

  mult_18/a[3] (verilog_DW_mult_uns_0)                    0.00       0.80 r

  …….

  outputd_reg[15]/D (DFFRHQX1)                            0.00       4.83 f

  data arrival time                                                  4.83

 

  clock clk_20 (rise edge)                               20.00      20.00

  clock network delay (ideal)                             0.00      20.00

  clock uncertainty                                      -1.00      19.00

  outputd_reg[15]/CK (DFFRHQX1)                           0.00      19.00 r

  library setup time                                     -0.23      18.77

  data required time                                                18.77

  --------------------------------------------------------------------------

  data required time                                                18.77

  data arrival time                                                 -4.83

  --------------------------------------------------------------------------

  slack (MET)                                                       13.94

但是有的时候我们希望在一个 clock edge上考虑setup ，例如DDR SDRAM的SQS与SQ的始终关系。

http://s7/middle/5e0abb26h77211cfb9e06&690<wbr>0 <wbr>–setup <wbr>应用" TITLE="set_multicycle_path <wbr>0 <wbr>–setup <wbr>应用" ACTION-DATA="http://s7/middle/5e0abb26h77211cfb9e06&690" ACTION-TYPE="show-slide" STYLE="margin: 0px; padding: 0px; list-style: none;" />

http://s3/middle/5e0abb26h77211cfd0a72&690<wbr>0 <wbr>–setup <wbr>应用" TITLE="set_multicycle_path <wbr>0 <wbr>–setup <wbr>应用" ACTION-DATA="http://s3/middle/5e0abb26h77211cfd0a72&690" ACTION-TYPE="show-slide" STYLE="margin: 0px; padding: 0px; list-style: none;" />

 

 

这就要使用到命令set_multicycle_path 0 –setup 使capture edge 与 launch edge 在一个clock edge 上进行setup check。

例如命令：

# For rising clock edge:

set_input_delay 0.4 -max -clock DQS [get_ports DQ]

set_input_delay -0.4 -min -clock DQS [get_ports DQ]

# This is with respect to clock rising edge (default).

# Similarly for falling edge:

set_input_delay 0.35 -max -clock DQS -clock_fall \

[get_ports DQ]

set_input_delay -0.35 -min -clock DQS -clock_fall \

[get_ports DQ]

# The launch and capture are on the same edge:

set_multicycle_path 0 -setup -to UFF0/D

set_multicycle_path 0 -setup -to UFF5/D

 

检查结果为：

Point Incr Path

---------------------------------------------------------------

clock DQS (rise edge)               0.00   0.00

clock network delay (propagated)      0.00   0.00

input external delay                 0.40   0.40 f

DQ (in)                             0.00   0.40 f

UFF0/D (DF )                       0.00   0.40 f

data arrival time                            0.40

 

 

clock DQS (rise edge)               0.00   0.00

clock source latency                  0.00   0.00

DQS (in)                          0.00     0.00 r

UDLL0/Z (DLL )                   1.25     1.25 r

UFF0/CP (DF )                   0.00      1.25 r

library setup time                -0.05     1.20

data required time                         1.20

---------------------------------------------------------------

data required time                       1.20

data arrival time                         -0.40

---------------------------------------------------------------

slack (MET)                              0.80

 

 

Point Incr Path

---------------------------------------------------------------

clock DQS (fall edge)             2.50 2.50

……

UFF5/D (DFN ) 0.00 2.85 r

data arrival time 2.85

 

clock DQS (fall edge)             2.50 2.50

……

UFF5/CPN (DFN )                0.00 3.76 f

library setup time                 -0.05 3.71

data required time                      3.71

---------------------------------------------------------------

data required time                       3.71

data arrival time                        -2.85

---------------------------------------------------------------

slack (MET)                            0.86