Xilinx的FPGA高速串并转换模块GTP在调用编译时出现:
ERROR:Pack:1107 - Unable to combine the following symbols into a
single IOB
component:
PAD symbol
"GTP_SERDES_IF_inst/SYS_CLK_N" (Pad Signal = SYS_CLK_N)
SlaveBuffer
symbol
"GTP_SERDES_IF_inst/tile0_gtp0_refclk_ibufds_i/SLAVEBUF.DIFFIN"
(Output
Signal =
GTP_SERDES_IF_inst/tile0_gtp0_refclk_ibufds_i/SLAVEBUF.DIFFIN)
An IO component of type IOB
was chosen because the IO contains symbols and/or
properties consistent with
input, output, or bi-directional usage and
contains no other symbols or
properties that require a more specific IO
component type.
Each of the following
constraints specifies an illegal physical site for a
component of type IOB:
Symbol
"GTP_SERDES_IF_inst/SYS_CLK_N" (LOC=B12 [Physical Site Type =
IPAD])
The component type is
determined by the types of logic and the properties and
configuration of the logic it
contains. Please double check that the types of
logic elements and all of
their relevant properties and configuration options
are compatible with the
physical site type of the constraint.
ERROR:Pack:1107 - Unable to combine the following symbols into a
single IOB
component:
PAD symbol
"GTP_SERDES_IF_inst/SYS_CLK_P" (Pad Signal = SYS_CLK_P)
DIFFAMP
symbol "GTP_SERDES_IF_inst/tile0_gtp0_refclk_ibufds_i/IBUFDS"
(Output Signal =
GTP_SERDES_IF_inst/sys_clk)
An IO component of type IOB
was chosen because the IO contains symbols and/or
properties consistent with
input, output, or bi-directional usage and
contains no other symbols or
properties that require a more specific IO
component type.
Each of the following
constraints specifies an illegal physical site for a
component of type IOB:
Symbol
"GTP_SERDES_IF_inst/SYS_CLK_P" (LOC=A12 [Physical Site Type =
IPAD])
The component type is
determined by the types of logic and the properties and
configuration of the logic it
contains. Please double check that the types of
logic elements and all of
their relevant properties and configuration options
are compatible with the
physical site type of the constraint.
ERROR:Pack:1107 - Pack was unable to combine the symbols listed
below into a
single IOB component because
the site type selected is not compatible.
Further explanation:
The component type is
determined by the types of logic and the properties and
configuration of the logic it
contains. In this case an IO component of type
IOB was chosen because the IO
contains symbols and/or properties consistent
with input, output, or
bi-directional usage and contains no other symbols or
properties that require a more
specific IO component type. Please double
check that the types of logic
elements and all of their relevant properties
and configuration options are
compatible with the physical site type of the
constraint.
Summary:
Symbols involved:
PAD symbol
"TILE0_GTP0_REFCLK_PAD_N_IN" (Pad Signal =
TILE0_GTP0_REFCLK_PAD_N_IN)
SlaveBuffer
symbol "tile0_gtp0_refclk_ibufds_i/SLAVEBUF.DIFFIN" (Output
Signal =
tile0_gtp0_refclk_ibufds_i/SLAVEBUF.DIFFIN)
Component type involved:
IOB
Site Location involved:
B12
Site Type involved: IPAD
ERROR:Pack:1107 - Pack was unable to combine the symbols listed
below into a
single IOB component because
the site type selected is not compatible.
Further explanation:
The component type is
determined by the types of logic and the properties and
configuration of the logic it
contains. In this case an IO component of type
IOB was chosen because the IO
contains symbols and/or properties consistent
with input, output, or
bi-directional usage and contains no other symbols or
properties that require a more
specific IO component type. Please double
check that the types of logic
elements and all of their relevant properties
and configuration options are
compatible with the physical site type of the
constraint.
Summary:
Symbols involved:
PAD symbol
"TILE0_GTP0_REFCLK_PAD_P_IN" (Pad Signal =
TILE0_GTP0_REFCLK_PAD_P_IN)
DIFFAMP
symbol "tile0_gtp0_refclk_ibufds_i/IBUFDS" (Output Signal =
tile0_gtp0_refclk_i)
Component type involved:
IOB
Site Location involved:
A12
Site Type involved: IPAD
字面意思是FPGA GTP专用时钟I/O无法连接到GTO模块。
出现这个错误的原因是在Synthesize -
XST的处理属性中的keep_hierarchy设置成YES,需要设置成NO。
加载中,请稍候......