AEC-Q100标准解读之PTC(Power Temperature Cycling)及HTSL（High Temperature Storage Life）

Power Temperature Cycling (PTC)

参考标准：JEDEC JJESD22-A105；

目的：评估IC产品中具有不同热膨胀系数的金属之间的界面的接触良率。方法是通过循环流动的空气从高温到低温重复变化；

失效机制：电介质的断裂，导体和绝缘体的断裂，不同界面的分层；

试验通过判断依据：芯片试验完成后FT常、高温测试pass；

PC before PTC for surface mount devices. Test required only on devices with maximum rated power ≥ 1 watt or Tj 40oC or devices designed to drive inductive loads.

Grade 0: Ta of -40oC to +150oC for 1000 cycles.

Grade 1: Ta of -40oC to +125oC for 1000 cycles.

Grades 2 and 3: Ta of -40oC to +105oC for 1000 cycles.

Thermal shut-down shall not occur during this test. 

TEST before and after PTC at room and hot temperature.

需求确认：需客户提供客户提供PTC参考原理图或者设计需求、芯片POD、硬件需求数量等

High Temperature Storage Life (HTSL)

参考标准：JEDEC JESD22-A103；

目的：评估IC产品在实际使用之前在高温条件下保持几年不工作条件下的生命时间；

失效机制：化学和扩散效应，Au-AI共金效应；

试验通过判断依据：芯片试验完成后FT常、高温测试pass；

实验室能力范围： 芯片级别的HTSL都可以做；

需求确认：需要客户提供芯片POD、具体试验条件、以及试验样品数量。

Plastic Packaged Parts 

Grade 0: +175oC Ta for 1000 hours or +150oC Ta for 2000 hours.

Grade 1: +150oC Ta for 1000 hours or +175oC Ta for 500hours.

Grades 2 and 3: +125oC Ta for 1000 hours or +150oC Ta for 500 hours.

Ceramic Packaged Parts

+250oCTa for 10 hours or +200oC Ta for 72 hours.

TEST before and after HTSL at room and hot temperature.

NOTE: Data from Test B3 (EDR) can be substituted for Test A6 (HTSL) if package and grade level requirements are met.