OP6180：Digital Front-End Processor(2012-07-30 20:04:39)
The OP6180 Digital Front-End (DFE) processor integrates digital pre-distortion (DPD) linearization technology as well as a crest factor reduction (CFR) engine. Only Broadcom's Universal DFE™ technology adapts in real time to linearize any type or combination of signals (2G, 3G, or 4G) on any type of power amplifier (PA) (AB, Doherty, Envelope Tracking, etc.) on any PA transistor technology (LDMOS, GaS, GaN, etc.) while supporting the widest bandwidth and highest efficiency in the industry. As an example of performance, this solution can deliver Class 1, 8-carrier MC-GSM performance and IMD suppression of more than -70dBc. Achievable levels of adjacent channel power ratio (ACPR) improvement are on the order of 30dB when operating a Doherty class power amplifier (PA) processing CDMA, WCDMA, WiMAX or LTE signals and operating the PA at efficiency levels in excess of 40%. In a MC-GSM environment using a similar Doherty class PA, designers can expect an ACPR performance improvement of greater than 40dB with efficiencies greater than 30%.
This superior bandwidth and performance eliminates barriers to multi-protocol (2G, 3G and 4G) base stations and radio access network (RAN) sharing. Target applications include Macrocell down to picocell/small cell RF implementations for GSM/EDGE, CDMA, CDMA2000, WCDMA, TD-SCDMA, WiMAX, 3G, LTE, WiBro, DTV and point-to-point communications.
There are three OP6180 device speed grades available:
-OP6180-0 with 20MHz of 2G and 30MHz of 3G/4G signal bandwidth
-OP6180-1 with 20MHz of 2G and 35MHz of 3G/4G signal bandwidth
-OP6180-2 with 35MHz of 2G and 65MHz of 3G/4G signal bandwidth
Digital pre-distortion (DPD) and crest factor reduction (CFR) engines
27mm x 27mm PBGA package
Operation over full industrial temperature range of -40° to 85°C
Does not require an external processor, support circuitry or algorithmic programming
Supports any PA configuration, modulation scheme or signal chain architecture
Comprehensive system monitor and alarm functions to maximize power amplifier reliability
LVDS and 1.8V CMOS interfaces to DAC/ADC devices
Low power consumption
1、AN10951：1805 MHz to 1880 MHz asymmetrical Doherty amplifier with the BLF7G20LS-90P and BLF7G21LS-160P